aprisa

Next-Gen Physical Design

The P&R engine that includes placement, clock tree synthesis, optimization, global routing and detailed routing.

apogee

Seamless Chip Assembly

The complete, top down floorplanning and chip assembly tool provides a seamless integrated design environment.

News and Events

03/10/2016 ATopTech Plans to Contest Verdict Read more
02/02/2016 Kaye Scholer Secures Significant Victory for ATopTech by Invalidating Key Synopsys Patent Claims Read more
11/09/2015 ATopTech’s Physical Implementation Tools Enabled for GLOBALFOUNDRIES 22FDX Platform Reference Flow Read more

ATopTech Customers

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The solutions for your advanced technology nodes design challenges

 

We help designers worldwide accomplish the fastest time to design closure on advanced technology nodes

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