Multi-corner Multi-mode Analysis
The ever increasing significance of the PVT (Process, Voltage, and Temperature) variation from today’s trend in semiconductor design demands more design corners to be signed-off. The timing and functionality of complex designs also need to be verified and optimized for multiple operation modes. Aprisa’s advanced MCMM analysis ensures designs are efficiently optimized for all modes and all corners, and for all QoR design metrics, throughout the design process.
- Sophisticated mechanism: unlimited number of scenarios are analyzed in either sequential, multi-threaded, or distributed mode
- Adaptive MCMM automatically groups scenarios and analyzes them in mixed sequential/multi-threaded mode, thus achieves optimal balance of memory usage and run time for any given computation resources.
- Flexible scenario creation: each scenario has its own mode (SDC), library corner, and RC condition.
- Native MCMM throughout the entire flow: place_opt, cts, post_cts_opt, groute_opt and droute_opt for predictable design closure
- Allows different set of "effective scenarios" to be analyzed at different stage of the flow
- Progressive MCMM CTS automatically merges different modes and considers crossing of clock domains from different mode.