NetLogic Microsystems Selects ATopTech's Next GenerationPhysical Design Solutions for 28nm Designs

Aprisa shortens design time and productivity whileproviding excellent quality results for SoCs

SAN JOSE, CA – September 26, 2011— ATopTech, the leader in next-generation physical design solutions thataddress the challenges of designing integrated circuits (ICs), announced todaythat NetLogic Microsystems,Inc., a worldwide leader in high-performance intelligent semiconductorsolutions for next-generation Internet networks, has selected ATopTech's Aprisa physical design solution for designingcomplex system-on-chip (SoC) designs at 28nm. Aprisa will be used to designNetLogic Microsystems' next generation XLP® II multi-core processors.

Designers face many new challenges at lowergeometries. ATopTech's physical design tools are architected specifically tomeet the design and performance challenges inherent in designing ICs at themost advanced technology nodes, including 28nm design enablement, timing,reliability, low power and design for manufacturing (DFM) capabilities. Aprisaprovides fast physical design closure with superior results.

"Wechose ATopTech's Aprisa for our 28nm tapeouts because it offers DRC cleanrouted designs and timing clean databases across multiple corners andmodes. Aprisa's router was tailored to handle complex 28nm design rulesand its revamped timing engine offers good timing correlation with SI to oursign-off STA tool," saidNazar Zaidi, vice president of engineering at NetLogic Microsystems. "Aftersuccessfully using Aprisa on our XLP832 multi-core processor development in the40nm node, ATopTech was the clear choice for our future 28nm designs."

NetLogicMicrosystems' best-in-class XLP832 multi-core processor integrates 32 NXCPUs™featuring quad-issue, quad-threaded and superscalar out-of-ordercapabilities. It contains an innovative tri-level cache architectureproviding a total of 12MBytes of cache, a high-performance memory subsystemwith four on-chip 72-bit DDR3 memory controllers with 51.2 Gbps of bandwidth, alow-latency, high-speed fast messaging network and numerous autonomousacceleration engines that offload processing tasks from the processor coreincluding a network acceleration engine, a packet ordering engine, a security engine,a compress/decompression engine and an 8-channel DMA and storage acceleration engine.

"ATopTechsolutions deliver shorter design time, improved productivity and qualityresults to leading-edge SoC designers," said Eric Thune, vice president ofsales and marketing at ATopTech. "We are pleased to continue working withNetLogic Microsystems as they expand into smaller geometries. Their decision touse ATopTech's solutions for their 28nm designs validates the competitiveadvantage offered by our tools."

About Aprisa

Aprisa is a complete place-and-route (P&Rengine), including placement, clock tree synthesis, optimization, globalrouting and detailed routing. The core of the technology is its hierarchicaldatabase. Built upon the hierarchical database are common "analysis engines",such as RC extraction, design rule checking (DRC) engine, and an advanced,extremely fast timing engine to solve the complex timing issues associated withOCV, signal integrity (SI) and multi-corner multi-mode (MCMM) analysis.Aprisa uses state-of-the-art multi-threading and distributed processingtechnology to further speed up the process. Because of this advancedarchitecture, Aprisa is able to deliver predictability and consistencythroughout the flow, and hence faster total turn-around time (TAT) and bestquality of results (QoR) for physical design projects.

About ATopTech

ATopTech,Inc. is the technology leader in IC physical design. ATopTech's technologyoffers the fastest time to design closure focused on advanced technology nodes.The use of state-of-the-art multi-threading and distributed processingtechnologies speeds up the design process, resulting in unsurpassed projectcompletion times. For more information, see www.atoptech.com

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Aprisa and Apogee are trademarksand ATopTech is a registered trademark of ATopTech, Inc. XLP is a registeredtrademark of NetLogic Microsystems, Inc. Any other trademarks or trade namesmentioned are the property of their respective owners.