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Press Releases
04/07/10

01/19/10

01/10/10

07/27/09
Adds fully integrated top-down, bottom-up chip planning, chip assembly, timing closure capabilities to industry-leading portfolio

07/24/09
What to see at DAC, ATopTech recommended by Gary Smith and John Cooley DeepChip

03/31/09

01/26/09
Company Sees First 40 nm Design Tape-Out, Expands Production Tape-Out Count

01/23/08
SoC designers using Aprisa produced the best quality of results with very short turn-around time; used flat design methodology which will be continued on other large SoC designs

Japanese Version

12/10/07
With multimillion-dollar revenues, ATopTech is the new face of physical design for semiconductors at 90nm and below.

12/10/07
Aprisa allows Broadcom to leverage next generation place and route tools for designing ICs at 65 nm and below



Articles

Silicon 60 List - Page 26
 
Read why companies are using Aprisa
 
ATopTech takes a fresh approach to place and route
 
 
 
 
 
 
 


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